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Power Distribution Networks with On-Chip Decoupling Capacitors (Record no. 10272)

000 -LEADER
fixed length control field 04736nam a22004695i 4500
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140310143333.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 101123s2011 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441978714
978-1-4419-7871-4
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
264 #1 -
-- New York, NY :
-- Springer New York,
-- 2011.
912 ## -
-- ZDB-2-ENG
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Jakushokas, Renatas.
Relator term author.
245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE
Title Power Distribution Networks with On-Chip Decoupling Capacitors
Medium [electronic resource] /
Statement of responsibility, etc by Renatas Jakushokas, Mikhail Popovich, Andrey V. Mezhiba, Selçuk Köse, Eby G. Friedman.
300 ## - PHYSICAL DESCRIPTION
Extent XXV, 644p. 150 illus.
Other physical details online resource.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- Inductive Properties of Electric Circuits -- Properties of On-Chip Inductive Current Loops -- Electromigration -- Scaling Trends of On-Chip Power Distribution Noise -- High Performance Power Distribution Systems -- On-Chip Power Distribution Networks -- Computer-Aided Design and Analysis -- Closed Form Expressions for Fast IR Drop Analysis -- Inductive Properties of On-Chip Power Distribution Grids -- Variation of Grid Inductance with Frequency -- Inductance/Area/Resistance Tradeoffs Inductance Model of Interdigitated Power and Ground Distribution Networks -- On-chip Power Noise Reduction Techniques in High Performance ICs -- Impedance/Noise Issues in On-Chip Power Distribution Networks -- Impedance Characteristics of Multi-Layer Grids -- Multi-Layer Interdigitated Power Distribution Networks -- Multiple On-Chip Power Supply Systems -- On-Chip Power Distribution Grids with Multiple Supply Voltages -- Background for Decoupling Capacitance -- Decoupling Capacitors for Multi-Voltage Power Distribution Systems -- Effective Radii of On-Chip Decoupling Capacitors -- Efficient Placement of Distributed On-Chip Decoupling Capacitors -- Simultaneous Co-Design of Distributed On-Chip Power Supplies and Decoupling Capacitors -- Conclusions.
520 ## - SUMMARY, ETC.
Summary, etc Power Distribution Networks with On-Chip Decoupling Capacitors, 2nd edition is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. This book provides a broad and cohesive treatment of power distribution systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors. The book provides insight and intuition into the behavior and design of on-chip power distribution systems.    This book has four primary objectives. The first objective is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the terminals of the on-chip circuitry. The second objective is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for efficiently placing on-chip decoupling capacitors in nanoscale integrated circuits. Finally, the fourth objective is to suggest novel architectures for distributing power across an integrated circuit, as well as provide new methodologies to efficiently analyze and design on-chip power grids.   Organized into subareas to provide a more intuitive flow to the reader, this edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
Topical term or geographic name as entry element Computer science.
Topical term or geographic name as entry element Electronics.
Topical term or geographic name as entry element Systems engineering.
Topical term or geographic name as entry element Engineering.
Topical term or geographic name as entry element Circuits and Systems.
Topical term or geographic name as entry element Electronics and Microelectronics, Instrumentation.
Topical term or geographic name as entry element Processor Architectures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Popovich, Mikhail.
Relator term author.
Personal name Mezhiba, Andrey V.
Relator term author.
Personal name Köse, Selçuk.
Relator term author.
Personal name Friedman, Eby G.
Relator term author.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781441978707
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4419-7871-4
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Item type E-Book
Copies
Price effective from Permanent location Date last seen Not for loan Date acquired Source of classification or shelving scheme Koha item type Damaged status Lost status Withdrawn status Current location Full call number
2014-03-28AUM Main Library2014-03-28 2014-03-28 E-Book   AUM Main Library621.3815