000 -LEADER |
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02992nam a22004215i 4500 |
003 - CONTROL NUMBER IDENTIFIER |
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005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20140310143336.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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111117s2012 xxu| s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9781461409625 |
|
978-1-4614-0962-5 |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
264 #1 - |
-- |
New York, NY : |
-- |
Springer New York, |
-- |
2012. |
912 ## - |
-- |
ZDB-2-ENG |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Yu, Qiaoyan. |
Relator term |
author. |
245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE |
Title |
Transient and Permanent Error Control for Networks-on-Chip |
Medium |
[electronic resource] / |
Statement of responsibility, etc |
by Qiaoyan Yu, Paul Ampadu. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XII, 160 p. |
Other physical details |
online resource. |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Introduction -- Existing Transient and Permanent Error Management in NoCs -- Adaptive Error Control Coding at Datalink Layer -- Transient and Permanent Link Errors Co-Management -- Dual-Layer Cooperative Error Control for Transient Error -- A Flexible Parallel Simulator for Networks-on-Chip with Error Control -- Conclusions and Future Directions. . |
520 ## - SUMMARY, ETC. |
Summary, etc |
This book addresses reliability and energy efficiency of on-chip networks using a configurable error control coding (ECC) scheme for datalink-layer transient error management. The method can adjust both error detection and correction strengths at runtime by varying the number of redundant wires for parity-check bits. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance. Includes a complete survey of error control methods for reliable networks-on-chip, evaluated for reliability, energy and performance metrics; Provides analysis of error control in various network-on-chip layers, as well as presentation of an innovative multi-layer error control coding technique; Presents state-of-the-art solutions to address simultaneously reliability, energy and performance; Describes configurable error management solutions and their hardware implementation details for variable noise conditions; Provides details of a flexible and parallel NoC simulator and corresponding simulation setup to achieve the reported results. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Engineering. |
|
Topical term or geographic name as entry element |
Electronics. |
|
Topical term or geographic name as entry element |
Systems engineering. |
|
Topical term or geographic name as entry element |
Engineering. |
|
Topical term or geographic name as entry element |
Circuits and Systems. |
|
Topical term or geographic name as entry element |
Electronics and Microelectronics, Instrumentation. |
|
Topical term or geographic name as entry element |
Nanotechnology and Microengineering. |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Ampadu, Paul. |
Relator term |
author. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Display text |
Printed edition: |
International Standard Book Number |
9781461409618 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-1-4614-0962-5 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Item type |
E-Book |