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| 003 - CONTROL NUMBER IDENTIFIER |
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| 005 - DATE AND TIME OF LATEST TRANSACTION |
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20140310143337.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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111215s2012 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781461415114 |
|
978-1-4614-1511-4 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| Edition number |
23 |
| 264 #1 - |
|---|
| -- |
New York, NY : |
| -- |
Springer New York, |
| -- |
2012. |
| 912 ## - |
|---|
| -- |
ZDB-2-ENG |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
El-Chammas, Manar. |
| Relator term |
author. |
| 245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE |
|---|
| Title |
Background Calibration of Time-Interleaved Data Converters |
| Medium |
[electronic resource] / |
| Statement of responsibility, etc |
by Manar El-Chammas, Boris Murmann. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
XX, 124 p. |
| Other physical details |
online resource. |
| 440 1# - SERIES STATEMENT/ADDED ENTRY--TITLE |
|---|
| Title |
Analog Circuits and Signal Processing |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Introduction -- Time-Interleaved ADCs -- Mitigation of Timing Skew -- Architecture Optimization -- Circuit Design -- Measurement Results -- Conclusion. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture. Discusses time-interleaved ADC theory in detail; Presents and analyzes a full solution for timing-skew in time-interleaved ADCs; Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate. Presents and analyzes a full solution for timing-skew in time-interleaved ADCs; Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Engineering. |
|
|---|
| Topical term or geographic name as entry element |
Electronics. |
|
|---|
| Topical term or geographic name as entry element |
Systems engineering. |
|
|---|
| Topical term or geographic name as entry element |
Engineering. |
|
|---|
| Topical term or geographic name as entry element |
Circuits and Systems. |
|
|---|
| Topical term or geographic name as entry element |
Electronics and Microelectronics, Instrumentation. |
|
|---|
| Topical term or geographic name as entry element |
Signal, Image and Speech Processing. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Murmann, Boris. |
| Relator term |
author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
|---|
| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
|---|
| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Printed edition: |
| International Standard Book Number |
9781461415107 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-1-4614-1511-4 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
|
| Item type |
E-Book |
