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High-Performance Computing Using FPGAs (Record no. 10679)

000 -LEADER
fixed length control field 04718nam a22004455i 4500
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140310143337.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 130502s2013 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781461417910
978-1-4614-1791-0
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2013.
912 ## -
-- ZDB-2-ENG
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Vanderbauwhede, Wim.
Relator term editor.
245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE
Title High-Performance Computing Using FPGAs
Medium [electronic resource] /
Statement of responsibility, etc edited by Wim Vanderbauwhede, Khaled Benkrid.
300 ## - PHYSICAL DESCRIPTION
Extent XI, 803 p. 232 illus.
Other physical details online resource.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note High-Performance Hardware Acceleration of Asset Simulations -- Monte Carlo Simulation based Financial Computing on the Maxwell FPGA Parallel Machine -- Bioinformatics Applications on the FPGA-based High-Performance Computer RIVYERA -- FPGA-Accelerated Molecular Dynamics -- FPGA-based HPRC for Bioinformatics Applications -- High-Performance Computing for Neuroinformatics using FPGA -- High-Performance FPGA-Accelerated Real-time Search -- High-Performance Data Processing over N-ary Trees -- FPGA-based Systolic Computational-Memory Array for Scalable Stencil Computations -- High performance implementation of RTM seismic modeling on FPGAs: architecture, arithmetic and power issues -- High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems -- FPGA-based HPRC Systems for Scientific Applications -- Accelerating the SPICE Circuit Simulator using an FPGA - A Case Study -- The Convey Hybrid-Core Architecture -- Low Cost High Performance Reconfigurable Computing -- An FPGA-based supercomputer for statistical physics: the weird case of Janus -- Accelerate Communication, not Computation! -- High-speed torus interconnect using FPGAs -- MEMSCALE: Re-architecting memory resources for clusters -- High-performance computing based on high-speed dynamic reconfiguration -- Reconfigurable arithmetic for HPC -- Acceleration of the Discrete Element Method: From RTL to C-Based Design -- Optimising Euroben Kernels on Maxwell -- Assessing Productivity of High-Level Design Methodologies for High-Performance Reconfigurable Computers -- Maximum performance computing with dataflow engines.
520 ## - SUMMARY, ETC.
Summary, etc This book is concerned with the emerging field of High Performance Reconfigurable Computing (HPRC), which aims to harness the high performance and relative low power of reconfigurable hardware–in the form Field Programmable Gate Arrays (FPGAs)–in High Performance Computing (HPC) applications. It presents the latest developments in this field from applications, architecture, and tools and methodologies points of view. We hope that this work will form a reference for existing researchers in the field, and entice new researchers and developers to join the HPRC community.  The book includes:  Thirteen application chapters which present the most important application areas tackled by high performance reconfigurable computers, namely: financial computing, bioinformatics and computational biology, data search and processing, stencil computation e.g. computational fluid dynamics and seismic modeling, cryptanalysis, astronomical N-body simulation, and circuit simulation.     Seven architecture chapters which present both commercial and academic parallel FPGA architectures, low latency and high performance FPGA-based networks and memory architectures for parallel machines, and a high speed optical dynamic reconfiguration mechanism for HPRC.  Five tools and methodologies chapters which address the important issue of productivity and high performance in HPRC. These include a study of precision and arithmetic issues in HPRC, comparative studies of C-based high level synthesis tools and RTL-based approaches, taxonomy of HPRC tools and a framework of their analysis, and an integrated hardware-software-application approach to HPRC.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Engineering.
Topical term or geographic name as entry element Computer science.
Topical term or geographic name as entry element Mathematics.
Topical term or geographic name as entry element Systems engineering.
Topical term or geographic name as entry element Engineering.
Topical term or geographic name as entry element Circuits and Systems.
Topical term or geographic name as entry element Processor Architectures.
Topical term or geographic name as entry element Information and Communication, Circuits.
Topical term or geographic name as entry element Electronic Circuits and Devices.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Benkrid, Khaled.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9781461417903
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4614-1791-0
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Item type E-Book
Copies
Price effective from Permanent location Date last seen Not for loan Date acquired Source of classification or shelving scheme Koha item type Damaged status Lost status Withdrawn status Current location Full call number
2014-03-29AUM Main Library2014-03-29 2014-03-29 E-Book   AUM Main Library621.3815
Languages: 
English |
العربية