000 -LEADER |
fixed length control field |
02343nam a22003975i 4500 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
OSt |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20140310143358.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
100917s2011 ne | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9789048197163 |
|
978-90-481-9716-3 |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.3815 |
Edition number |
23 |
264 #1 - |
-- |
Dordrecht : |
-- |
Springer Netherlands : |
-- |
Imprint: Springer, |
-- |
2011. |
912 ## - |
-- |
ZDB-2-ENG |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Louwsma, Simon. |
Relator term |
author. |
245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE |
Title |
Time-interleaved Analog-to-Digital Converters |
Medium |
[electronic resource] / |
Statement of responsibility, etc |
by Simon Louwsma, Ed Tuijl, Bram Nauta. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
XVI, 136p. |
Other physical details |
online resource. |
440 1# - SERIES STATEMENT/ADDED ENTRY--TITLE |
Title |
Analog Circuits and Signal Processing |
520 ## - SUMMARY, ETC. |
Summary, etc |
Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Engineering. |
|
Topical term or geographic name as entry element |
Systems engineering. |
|
Topical term or geographic name as entry element |
Engineering. |
|
Topical term or geographic name as entry element |
Circuits and Systems. |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Tuijl, Ed. |
Relator term |
author. |
|
Personal name |
Nauta, Bram. |
Relator term |
author. |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
773 0# - HOST ITEM ENTRY |
Title |
Springer eBooks |
776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
Display text |
Printed edition: |
International Standard Book Number |
9789048197156 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-90-481-9716-3 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Item type |
E-Book |