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Transactions on High-Performance Embedded Architectures and Compilers IV (Record no. 13869)

000 -LEADER
fixed length control field 04891nam a22004935i 4500
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140310144102.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 111114s2011 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783642245688
978-3-642-24568-8
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number QA76.9.C62
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004
Edition number 23
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 2011.
912 ## -
-- ZDB-2-SCS
-- ZDB-2-LNC
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Stenström, Per.
Relator term editor.
245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE
Title Transactions on High-Performance Embedded Architectures and Compilers IV
Medium [electronic resource] /
Statement of responsibility, etc edited by Per Stenström.
300 ## - PHYSICAL DESCRIPTION
Extent XV, 430p. 222 illus.
Other physical details online resource.
440 1# - SERIES STATEMENT/ADDED ENTRY--TITLE
Title Lecture Notes in Computer Science,
International Standard Serial Number 0302-9743 ;
Volume number/sequential designation 6760
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors -- Characterizing Time-Varying Program Behavior Using Phase Complexity Surfaces -- Compiler Directed Issue Queue Energy Reduction -- A Systematic Design Space Exploration Approach to Customising Multi-Processor Architectures: Exemplified Using Graphics Processors -- Microvisor: A Runtime Architecture for Thermal Management in Chip Multiprocessors -- Special Section on High-Performance and Embedded Architectures and Compilers (HiPEAC) -- A Highly Scalable Parallel Implementation of H.264 -- Communication Based Proactive Link Power Management -- Finding Extreme Behaviors in Microprocessor Workloads -- Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture -- Special Section on Selected papers from the Workshop on Software and Hardware Challenges of Many-core Platforms -- Transaction Reordering to Reduce Aborts in Software Transactional Memory -- A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture -- A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM -- Software Transactional Memory Validation – Time and Space Considerations Tiled Multi-Core Stream Architecture -- An Efficient and Flexible Task Management for Many Cores -- Special Section on International Symposium on Systems, ArchitecturesModeling and Simulation -- On Two-layer Brain-inspired Hierarchical Topologies: A Rent’s Rule Approach -- Advanced Packet Segmentation and Buffering Algorithms in Network Processors -- Energy Reduction by Systematic Run-Time Reconfigurable Hardware Deactivation -- A Cost Model for Partial Dynamic Reconfiguration -- Heterogeneous Design in Functional DIF -- Signature-based Calibration of Analytical Performance Models for System-level Design Space Exploration.
520 ## - SUMMARY, ETC.
Summary, etc Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 4th issue contains 21 papers carefully reviewed and selected out of numerous submissions and is divided in four sections. The first section contains five regular papers. The second section consists of the top four papers from the 4th International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The third section contains a set of six papers providing a snap-shot from the Workshop on Software and Hardware Challenges of Manycore Platforms, SHCMP 2008 held in Beijing, China, in June 2008. The fourth section consists of six papers from the 8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS VIII (2008) held in Samos, Greece, in July 2008.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
Topical term or geographic name as entry element Data transmission systems.
Topical term or geographic name as entry element Logic design.
Topical term or geographic name as entry element Computer Communication Networks.
Topical term or geographic name as entry element Computer Science.
Topical term or geographic name as entry element Arithmetic and Logic Structures.
Topical term or geographic name as entry element Processor Architectures.
Topical term or geographic name as entry element Input/Output and Data Communications.
Topical term or geographic name as entry element Logic Design.
Topical term or geographic name as entry element Computer Communication Networks.
Topical term or geographic name as entry element Programming Languages, Compilers, Interpreters.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783642245671
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-642-24568-8
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Item type E-Book
Copies
Price effective from Permanent location Date last seen Not for loan Date acquired Source of classification or shelving scheme Koha item type Damaged status Lost status Withdrawn status Current location Full call number
2014-03-31AUM Main Library2014-03-31 2014-03-31 E-Book   AUM Main Library004
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