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| 003 - CONTROL NUMBER IDENTIFIER |
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OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20140310151109.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
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cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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100301s2010 xxu| s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9781441911766 |
|
978-1-4419-1176-6 |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7888.4 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| Edition number |
23 |
| 264 #1 - |
|---|
| -- |
New York, NY : |
| -- |
Springer New York, |
| -- |
2010. |
| 912 ## - |
|---|
| -- |
ZDB-2-SCS |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Hohenauer, Manuel. |
| Relator term |
author. |
| 245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE |
|---|
| Title |
C Compilers for ASIPs |
| Medium |
[electronic resource] : |
| Remainder of title |
Automatic Compiler Generation with LISA / |
| Statement of responsibility, etc |
by Manuel Hohenauer, Rainer Leupers. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
XV, 223p. 72 illus. |
| Other physical details |
online resource. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
ASIP Design Methodology -- A Short Introduction to Compilers -- Related Work -- Processor Designer -- Code Selector Description Generation -- Results for Semantics based Compiler Generation -- SIMD Optimization -- Predicated Execution -- Assembler Optimizer -- Summary. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
C Compilers for ASIPs: Automatic Compiler Generation with LISA by: Manuel Hohenauer Rainer Leupers The ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code. This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem; Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time; Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs; Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations and help to meet the stringent performance requirements of embedded applications. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Engineering. |
|
|---|
| Topical term or geographic name as entry element |
Computer aided design. |
|
|---|
| Topical term or geographic name as entry element |
Systems engineering. |
|
|---|
| Topical term or geographic name as entry element |
Engineering. |
|
|---|
| Topical term or geographic name as entry element |
Circuits and Systems. |
|
|---|
| Topical term or geographic name as entry element |
Computer-Aided Engineering (CAD, CAE) and Design. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Leupers, Rainer. |
| Relator term |
author. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
|---|
| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
|---|
| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Printed edition: |
| International Standard Book Number |
9781441911759 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-1-4419-1176-6 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
|
| Item type |
E-Book |
