| 000 -LEADER |
|---|
| fixed length control field |
04599nam a22005175i 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20140310151128.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
|---|
| fixed length control field |
cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
130107s2013 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9783642358982 |
|
978-3-642-35898-2 |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7895.M5 |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
004.1 |
| Edition number |
23 |
| 264 #1 - |
|---|
| -- |
Berlin, Heidelberg : |
| -- |
Springer Berlin Heidelberg : |
| -- |
Imprint: Springer, |
| -- |
2013. |
| 912 ## - |
|---|
| -- |
ZDB-2-SCS |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Xu, Weixia. |
| Relator term |
editor. |
| 245 10 - IMMEDIATE SOURCE OF ACQUISITION NOTE |
|---|
| Title |
Computer Engineering and Technology |
| Medium |
[electronic resource] : |
| Remainder of title |
16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers / |
| Statement of responsibility, etc |
edited by Weixia Xu, Liquan Xiao, Pingjing Lu, Jinwen Li, Chengyi Zhang. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
XIV, 263 p. 164 illus. |
| Other physical details |
online resource. |
| 440 1# - SERIES STATEMENT/ADDED ENTRY--TITLE |
|---|
| Title |
Communications in Computer and Information Science, |
| International Standard Serial Number |
1865-0929 ; |
| Volume number/sequential designation |
337 |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Session 1: Microprocessor and Implementation -- A Method of Balancing the Global Multi-mode Clock Network in Ultra-large Scale CPU -- Hardware Architecture for the Parallel Generation of Long-Period Random Numbers Using MT Method -- MGTE: A Multi-level Hybrid Verification Platform for a 16-Core Processer -- An Efficient Parallel SURF Algorithm for Multi-core Processor -- A Study of Cache Design in Stream Processor -- Design and Implementation of Dynamically Reconfigurable Token Coherence Protocol for Many-Core Processor -- Dynamic and Online Task Scheduling Algorithm Based on Virtual Compute Group in Many-Core Architecture -- ADL and High Performance Processor Design -- Session 2: Design of Integration Circuit -- The Design of the ROHC Header Compression Accelerator -- A Hardware Implementation of Nussinov RNA Folding Algorithm -- A Configurable Architecture for 1-D Discrete Wavelet Transform -- A Comparison of Folded Architectures for the Discrete Wavelet Transform -- A High Performance DSP System with Fault Tolerant for Space Missions -- The Design and Realization of Campus Information Release Platform Based on Android Framework -- A Word-Length Optimized Hardware Gaussian Random Number Generator Based on the Box-Muller Method -- Session 3: I/O Interconnect -- DAMQ Sharing Scheme for Two Physical Channels in High Performance Router -- Design and Implementation of Dynamic Reliable Virtual Channel for Network-on-Chip -- HCCM: A Hierarchical Cross-Connected Mesh for Network on Chip -- Efficient Broadcast Scheme Based on Sub-network Partition for Many-Core CMPs on Gem5 Simulator -- A Quick Method for Mapping Cores Onto 2D-Mesh Based Networks on Chip -- Session 4: Measurement, Verification, and Others -- A Combined Hardware/Software Measurement for ARM Program Execution Time -- A Low-Complexity Parallel Two-Sided Jacobi Complex SVD Algorithm and Architecture for MIMO Beamforming Systems -- A Thermal-Aware Task Mapping Algorithm for Coarse Grain Reconfigurable Computing System -- DC Offset Mismatch Calibration for Time-Interleaved ADCs in High-Speed OFDM Receivers -- An Novel Graph Model for Loop Mapping on Coarse-Grained Reconfigurable Architectures -- Memristor Working Condition Analysis Based on SPICE Model -- On Stepsize of Fast Subspace Tracking Methods. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
This book constitutes the refereed proceedings of the 16th National Conference on Computer Engineering and Technology, NCCET 2012, held in Shanghai, China, in August 2012. The 27 papers presented were carefully reviewed and selected from 108 submissions. They are organized in topical sections named: microprocessor and implementation; design of integration circuit; I/O interconnect; and measurement, verification, and others. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Computer science. |
|
|---|
| Topical term or geographic name as entry element |
Memory management (Computer science). |
|
|---|
| Topical term or geographic name as entry element |
Logic design. |
|
|---|
| Topical term or geographic name as entry element |
Operating systems (Computers). |
|
|---|
| Topical term or geographic name as entry element |
Computer Science. |
|
|---|
| Topical term or geographic name as entry element |
Processor Architectures. |
|
|---|
| Topical term or geographic name as entry element |
Arithmetic and Logic Structures. |
|
|---|
| Topical term or geographic name as entry element |
Memory Structures. |
|
|---|
| Topical term or geographic name as entry element |
Logic Design. |
|
|---|
| Topical term or geographic name as entry element |
Performance and Reliability. |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Xiao, Liquan. |
| Relator term |
editor. |
|
|---|
| Personal name |
Lu, Pingjing. |
| Relator term |
editor. |
|
|---|
| Personal name |
Li, Jinwen. |
| Relator term |
editor. |
|
|---|
| Personal name |
Zhang, Chengyi. |
| Relator term |
editor. |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
|---|
| Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY |
|---|
| Title |
Springer eBooks |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Printed edition: |
| International Standard Book Number |
9783642358975 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
http://dx.doi.org/10.1007/978-3-642-35898-2 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
|
| Item type |
E-Book |
