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Quantifying and Exploring the Gap Between FPGAs and ASICs

by Kuon, Ian.
Authors: Rose, Jonathan.%author. | SpringerLink (Online service) Physical details: XII, 181p. online resource. ISBN: 1441907394 Subject(s): Engineering. | Computer hardware. | Computer aided design. | Electronics. | Systems engineering. | Engineering. | Circuits and Systems. | Computer-Aided Engineering (CAD, CAE) and Design. | Computer Hardware. | Electronics and Microelectronics, Instrumentation.
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E-Book E-Book AUM Main Library 621.3815 (Browse Shelf) Not for loan

Background -- Measuring the Gap -- Automated Transistor Sizing for FPGAs -- Navigating the Gap Using Architecture and Process Technology Scaling -- Navigating the Gap using Transistor Sizing -- Conclusions and FutureWork.

Field-Programmable Gate Arrays (FPGAs) have become the dominant digital implementation medium as measured by design starts. They are preferred because designers can avoid the pitfalls of nanoelectronic design and because the designer can change the design up until the last minute. However, it has always been understood that FPGAs use more area, are slower, and consume far more power than the alternative: Application-Specific ICs built from standard cells. But how much? Quantifying and Exploring the Gap Between FPGAs and ASICs is the first book to explore exactly what that difference is, to enable system designers to make better in-formed choices between these two media and to give insight to FPGA makers on the deficiencies to attack and thereby improve FPGAs. The gap is a very nuanced thing, though: it strongly depends on the nature of the circuit being implemented, in sometimes counterintuitive ways. The book presents a careful exploration of these issues in its first half. The second half of the book looks at ways that creators and users of FPGAs can close the gap between FPGAs and ASICs. It presents the most sweeping exploration of FPGA architecture and circuit design ever performed. The authors show that, with careful use of transistor-level design, combined with good choices of the soft-logic architecture, that a wide spectrum of FPGA devices can be used to narrow specific selected gaps in area, speed and power.

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