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Item type | Location | Call Number | Status | Date Due |
---|---|---|---|---|
E-Book | AUM Main Library | 621.3815 (Browse Shelf) | Not for loan |
Introduction -- Time-Interleaved ADCs -- Mitigation of Timing Skew -- Architecture Optimization -- Circuit Design -- Measurement Results -- Conclusion.
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture. Discusses time-interleaved ADC theory in detail; Presents and analyzes a full solution for timing-skew in time-interleaved ADCs; Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate. Presents and analyzes a full solution for timing-skew in time-interleaved ADCs; Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate.
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