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Design, Analysis and Test of Logic Circuits Under Uncertainty by Krishnaswamy, Smita. Publication: . XI, 123 p. 71 illus. Availability: Copies available: AUM Main Library (1),
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VLSI Physical Design: From Graph Partitioning to Timing Closure by Kahng, Andrew B. Publication: . XII, 310 p. 150 illus. Availability: Copies available: AUM Main Library (1),
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